Pseudo-operand initialization

Pseudo-operands are placeholders for instruction backing tag structure members.
IMPORTANT:
When you use an instruction backing tag for a safety-critical operation, you must initialize the pseudo-operands during first scan. Refer to the GuardLogix 5580 and Compact GuardLogix 5380 Controller Systems Safety Reference, publication 1756-RM012, for methods to initialize pseudo-operands during first scan.
Pseudo-operands are initialized when the application is downloaded and never again, unless modified by the application.
  • When you specify a pseudo-operand value it is written directly to the member. If you use the same backing tag in another instruction and specify a different value, the previous value is overwritten by the new value.
  • Position (POS) and Accumulator (ACC) are initialized as described but they are also overwritten by the instruction when it executes.
    For example:
    • A false Timer on delay (TON) instruction sets the ACC to 0.
      • A true TON calculates the elapsed time and adds this to the ACC.
      • Preset (PRE) is used by the TON to determine when the DN bit should be set. The instruction does not change the PRE member.
    • When a LIFO Load (LFL) instruction executes (false-to-true transition), the source value is written to the LIFO and the POS is incremented.
    • When a LIFO Unload (LFU) instruction executes, the value at array[POS] is read and the POS is decremented.
This table lists the pseudo-operands.
TIP:
ASCII Serial Port instructions (AWT, AWA, ARD, ARL, ABL, ACB, AHL, and ACL) are available only on controllers that have serial ports. Logix Designer versions 37 and later do not support ASCII Serial Port instructions.
Instructions
Pseudo-operands
Allowed in safety routines
ASCII Test for Buffer Line (ABL)
POS
No
ASCII Chars in Buffer (ACB)
POS
No
ASCII Handshake Lines (AHL)
POS
No
ASCII Read (ARD)
LEN, POS
No
ASCII Read Line (ARL)
LEN, POS
No
File Average (AVE)
LEN, POS
No
ASCII Write Append (AWA)
LEN, POS
No
ASCII Write (AWT)
LEN, POS
No
Bit Shift Left (BSL)
LEN
No
Bit Shift Right (BSR)
LEN
No
Count Up (CTU)
PRE, ACC
Yes
Count Down (CTD)
PRE, ACC
Yes
Diagnostic Detect (DDT)
LEN, POS
No
File Arithmetic and Logic (FAL)
LEN, POS
Yes
File Bit Comparison (FBC)
LEN, POS
No
FIFO Load (FFL)
LEN, POS
No
FIFO Unload (FFU)
LEN, POS
No
File Search and Compare (FSC)
LEN, POS
Yes
LIFO Load (LFL)
LEN, POS
No
LIFO Unload (LFU)
LEN, POS
No
Retentive Timer On (RTO)
PRE, ACC
Yes
Sequencer Input (SQI)
LEN, POS
No
Sequencer Load (SQL)
LEN, POS
No
Sequencer Output (SQO)
LEN, POS
No
File Sort (SRT)
LEN, POS
No
File Standard Deviation (STD)
LEN, POS
No
Timer Off Delay (TOF)
PRE, ACC
Yes
Timer On Delay (TON)
PRE, ACC
Yes
Provide Feedback
Have questions or feedback about this documentation? Please submit your feedback here.