D Flip-Flop (DFF)

D Flip-Flop (DFF)

This information applies to the CompactLogix 5370, ControlLogix 5570, Compact GuardLogix 5370, GuardLogix 5570, Compact GuardLogix 5380, CompactLogix 5380, CompactLogix 5480, ControlLogix 5580, and GuardLogix 5580 controllers.
The DFF instruction sets the Q output to the state of the D input on a cleared to set transition of the Clock input. The QNot output is set to the opposite state of the Q output.
Available Languages
Ladder Diagram
This instruction is not available in ladder diagram logic.
Function Block
DFF_FBD_avail_v31
Structured Text
DFF(DFF_tag);
Operands
Function Block
Operand
Type
Format
Description
DFF tag
FLIP_FLOP_D
structure
DFF structure
FLIP_FLOP_D Structure
Input Parameter
Data Type
Description
EnableIn
BOOL
Enable input. If cleared, the instruction does not execute and outputs are not updated.
Default is set.
D
BOOL
The input to the instruction.
Default is cleared.
Clear
BOOL
Clear input to the instruction. If set, the instruction clears Q and sets QNot.
Clock
BOOL
Clock input to the instruction.
Default is cleared.
Output Parameter
Data Type
Description
EnableOut
BOOL
Indicates if instruction is enabled.
Q
BOOL
The output of the instruction.
QNot
BOOL
The complement of the Q output.
Structured Text
Operand
Type
Format
Description
DFF tag
FLIP_FLOP_D
structure
DFF structure
See
Structured Text Syntax
 for more information on the syntax of expressions within structured text.
Description
When Clear is set, the instructions clears Q and sets QNot. Otherwise, if Clock is set and Clockn-1 is cleared, the instruction sets Q=D and sets QNot = NOT (D).
The instruction sets Clockn-1 = Clock state every scan.
Affects Math Status Flags
No
Major/Minor Faults
None specific to this instruction. See
Common Attributes
 for operand-related faults.
Execution
Function Block
Condition/State
Action Taken
Prescan
EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is false
EnableIn and EnableOut bits are cleared to false.
Tag.EnableIn is true
EnableIn and EnableOut bits are set to true.
The instruction executes.
Instruction first run
Clockn-1 is set to 1.
Qn-1 is cleared to 0.
Instruction first scan
Previous input Clock state is set True.
Previous output Q state is set False.
Postscan
EnableIn and EnableOut bits are cleared to false.
Structured Text
Condition/State
Action Taken
Prescan
See Prescan in the Function Block table.
Normal Execution
See Tag.EnableIn is true in the Function Block table.
Postscan
See Postscan in the Function Block table.
Example
When Clock goes from cleared to set, the DFF instruction sets Q = D. When Clear is set, Q is cleared. The DFF instruction sets QNot to the opposite state of Q.
Function Block
DFF_FDB_ex_v31
Structured Text
DFF_03.D := d_input;
DFF_03.Clear := clear_input;
DFF_03.Clock := clock_input;
DFF(DFF_03);
q_output := DFF_03.Q;
qNot_output := DFF_03.QNot;
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